PicoLink Protocol Specification
PicoLink is a simplified directory-based cache-coherency protocol derived from TileLink, using the MESI coherence model over two channels (A: Core → CM, B: CM → Core), with no probe/downgrade messages and no release handshake.
This documentation is the authoritative specification for the PicoLink
protocol and its verification IP. Normative requirements are tagged with
stable rule identifiers (PL-<AREA>-<NN>); see
Introduction for the document conventions.
Contents:
- Introduction
- Channels
- Signal Descriptions and Flow Control
- Message Field Definitions
- MESI State Transitions
- Coherency Manager (CM) Behavior
- Ordering, Races, and Atomicity
- Message Sequence Diagrams
- Read miss, line uncached
- Read miss, shared copy exists
- Read miss, another core holds E
- Write miss, line uncached
- Write miss, multiple sharers
- Write hit on shared line: Upgrade
- Read while another core is Modified: forced WriteBack
- Voluntary WriteBack: cache eviction
- Race 1: dual Upgrade
- Race 3: Invalidate crosses Upgrade
- Race 4: voluntary WriteBack crosses Invalidate
- Glossary