PicoLink Protocol Specification

PicoLink is a simplified cache-coherency protocol based on TileLink, using the MESI coherence model and a two-channel (A / B) directory-based topology with no Probes and no Release.

This documentation is the authoritative specification for the PicoLink verification IP.

Contents:

• Introduction
  • Overview
  • Architectural Assumptions
• Channels
  • A Channel Messages (Core → CM)
  • B Channel Messages (CM → Core)
  • Grant Message Usage
• Message Field Definitions
  • Common Fields
  • A Channel Message Fields (Core → CM)
  • B Channel Message Fields (CM → Core)
  • Field Sizing Notes
• MESI State Transitions
  • Transition Table
• Coherency Manager (CM) Behavior
  • Directory State
  • CM Response Logic
• Race Conditions, Ordering & Atomicity
  • Message Ordering
  • Dual Upgrade Race
  • ReadShared vs Upgrade Race
  • Invalidate Crosses with Upgrade
• Message Sequence Diagrams
  • Simple Read Miss: No Other Sharers
  • Read Miss: Shared Copy Exists
  • Read Miss: Another Core Has Line in E
  • Write Miss: Line Not in Any Cache
  • Write Hit on Shared Line: Upgrade
  • Read While Another Core is Modified: Forced WriteBack
  • Voluntary WriteBack: Cache Eviction
  • Race Condition: Dual Upgrade
• Glossary

Indices

• Index

• Search Page